Many digital systems being designed today are embedded systems, which generally consist of both software and hardware components. Such embedded systems are found in a wide variety of applications, such as cellular phones, microwave ovens, automobiles, etc. As with any system, designers of an embedded system strive to obtain better performance by attempting to increase the processing speed of the system as a whole, while trying to reduce the cost and power consumption associated with the hardware components.
One factor that impacts the performance of an embedded system is whether a given function of the system is implemented as hardware or software. Implementing a particular function in software provides flexibility because software is easily modifiable, whereas it is usually cost prohibitive to change hardware components. On the other hand, implementing a function in hardware is generally faster than software. Hardware implementation may also reduce the demand on the processors executing the software and speed up software execution. Furthermore, by implementing a function in hardware, a designer may be able to use smaller, less powerful processors, which reduces the cost of the system as a whole. These are some of the competing goals a designer needs to balance in arriving at an optimal design.
The designer may need to move software components into hardware to improve system performance. Prior to such a move, the system performance may need to be measured at least once to select software components to be moved to hardware. Moreover, the system performance may need to be measured again after the move to verify improvements (if any) in the system's performance. Such a process may have to be repeated several times until an optimal system design is found. Unfortunately, this process is time consuming and cost prohibitive.
Until recently, software and hardware components could not even be tested or verified to see if they functioned together. Hardware emulators or simulators were used to verify the hardware design and the software components were tested separately using a compiler, debugger and other software testing tools. Currently, tools are available for co-verification of software and hardware components of an embedded system. One such tool is described in U.S. Pat. No. 5,771,370 (hereafter “the '370 patent”) to Klein. Designers may now use such co-verification tools to simultaneously verify that the hardware and software components of a system function together to yield the desired results.
Co-verification tools are limited to verifying that a completely designed system performs its intended functions. Such systems do not currently have the capability to inform the designers about other performance factors such as, which software functions may use the most processor capacity, perform the most memory accesses, or use the bus most often. Such information can aid a designer in deciding whether to implement a given functionality of the system in software or hardware. Some software profiling systems (e.g. Microsoft® Visual Studio® or Rational® Purify®) have the capability to provide a profile of a software execution that may pinpoint which of the various functions implemented in the software require the most processor time.
Once such functions are identified, they may be selectively moved to hardware to improve system performance. However, moving selected functions to hardware does not always result in improved system performance. Thus, the system performance may need to be measured after each repartitioning to verify any improvements, which can be costly and time consuming. Moreover, conventional profiling systems do not measure the system accurately (for example, they cannot account for the performance of the hardware components). Furthermore, such systems are not capable of providing a designer with the foresight of whether repartitioning a particular function to hardware can improve system performance or not. Currently, a system has to actually be repartitioned to verify any benefits of repartitioning.
Therefore, there is a need for a tool that can quickly and efficiently generate an accurate estimate of the performance profile of a repartitioned system.